Electrical Topology
Communication lines use pull-up resistors to maintain a default high signal level while connected devices only pull the line low. This circuit configuration, known as an open-drain bus, relies on active-low drive logic where no device actively drives the line to a high voltage. It allows multiple devices to share a single wire without risk of short circuits.
Signal Level
Voltage transitions depend heavily on the value of the pull-up resistor and the bus capacitance. When a device releases the line, the pull-up resistor slowly pulls the voltage back to the high state. This passive pull-up results in a slower rise time compared to the active-low fall time which is driven directly by transistor conduction.
Bus Capacitance
Maximum operating frequency is limited by the charging time of the distributed capacitance on the signal line. As more devices are added to the line, the cumulative capacitance increases and slows the rising edge of the pulses. This effect can be compensated by using smaller pull-up resistors, but this increases the current consumption when the line is held low.
Designers must balance power constraints against speed requirements.
Wired Logic
Implicit logic gates are formed by the parallel connection of multiple open-drain outputs. This arrangement acts as a wired-AND gate in positive logic systems. If any single device pulls the line low, the entire bus registers a low state.
