Precision Bandgap Thermal Stress Error Reduction across Surface Mount Packages
Mitigate bandgap thermal stress errors using compliant leaded packages, PCB isolation slots, polyimide die buffers, and stabilized factory calibration.
Piezojunction Effect
Stress Phenomenon
A mechanical stress-induced change modifies the electrical characteristics of a semiconductor junction when the silicon die experiences physical deformation. This phenomenon is known as the piezojunction effect and typically alters the leakage current and current gain of bipolar transistors. In precision analog integrated circuits, such changes can degrade the accuracy of bandgap voltage references and operational amplifiers.
Silicon sensor designs must account for these stress-induced shifts to prevent performance degradation over time.
Physical Mechanism
Deformation of the silicon crystal lattice shifts the energy bands and alters the bandgap energy of the semiconductor material. This change in bandgap directly affects the intrinsic carrier concentration, which in turn modifies the barrier height and the diffusion current across the pn junction. High packaging stresses from potting or molding compound shrinkage intensify this physical change.
Calibration Drift
Precision instruments lose their factory calibration when long-term packaging stresses fluctuate due to humidity absorption or thermal cycling. Since the piezojunction effect causes the reference voltage of the chip to drift, the downstream measurements become increasingly inaccurate over time. Manufacturers of high-resolution analog-to-digital converters use ceramic packaging or die-attach compounds with low young modulus to isolate the silicon from these external forces.
This isolation ensures that the sensitive semiconductor junctions remain unaffected by the physical twisting or bending of the printed circuit board.
Package Mitigation
Layout strategies such as placing sensitive reference circuits in the center of the die where stress gradients are lowest can reduce these effects. Additionally, circuit designers implement stress-compensation circuitry and dummy structures to cancel out the remaining offset voltages. Test engineers run accelerated lifetime tests to measure the stability of the output under mechanical and thermal stress to ensure compliant operation in the field.
Piezoresistive Bandgap Reference Drift under Asymmetric Surface Mount Thermal Expansion Gradients
Asymmetric thermal expansion shifts bandgap voltage via piezoresistive substrate stress; mechanical slots and ceramic packaging isolate critical reference nodes.