Analytical Shear Lag Modeling for Strain Transmission into Bottom Terminated Packages
Analytical shear lag models quantify strain transfer from boards to bottom-terminated packages, showing compliant die attach drops offset drift by 98 percent.
IPC-JEDEC-9702
Industrial Standard
Board-level strain characterization requires standardized test methodologies to ensure repeatability across different testing laboratories. The IPC-JEDEC-9702 standard provides guidelines for monotonic bend testing of printed circuit board assemblies to evaluate the mechanical attachment of surface mount components. It defines the parameters for both four-point and three-point bending tests to characterize the load at which solder joint failure occurs.
Testing Methodology
Mechanical loading under this standard applies a continuous, controlled displacement to the test board to simulate the stresses encountered during assembly, transport, or system integration. A test fixture holds the board by its edges while a mechanical actuator applies a force that bends the assembly, during which continuous electrical monitoring detects the precise moment of solder joint rupture. The standard requires the board to be populated with daisy-chained components so that any interruption in the electrical circuit is recorded immediately.
Metrological Criterion
Strains must be measured using surface-mounted strain gauges placed at specified distances from the corner of the test component to avoid boundary effects. The standard dictates the gauge orientation and the calculation of principal strain, establishing a baseline against which different packaging technologies can be directly compared. Calibration of the loading rate and the load cell ensures that the force-displacement data remains accurate and traceable to national metrology standards, which prevents false passes during product qualification.
Application Constraint
While this standard defines the limits of static bending resistance, it does not address the high strain rates associated with drop testing or accidental impacts. Dynamic board strain differs from static bend strain because the material behaves differently under rapid loading due to viscoelasticity. Engineers must therefore use separate, high-rate test standards to characterize the impact resistance of the same solder joint geometry.
Calculating Surface Strain Field Distribution across Deflecting Circuit Board Assemblies
Surface strain fields across deflecting circuit boards scale with distance from the neutral axis and concentrate sharply at stiff component perimeters.