Feedback Topology
Circuit configurations for maintaining a constant voltage across a resistor or junction improve input impedance by isolating the signal from the bias network. In a typical implementation, boot-strapped bias employs a feedback path to drive the bottom of a bias resistor with a voltage that tracks the input signal. Signal currents are prevented from flowing through the bias branch by this arrangement.
Such a configuration differs from fixed biasing by making the bias network appear nearly invisible to the source.
Impedance Transformation
The effective resistance of the network rises when the feedback ratio approaches unity. For instance, if a follower circuit drives the bias node, boot-strapped bias can multiply the native resistance of the bias components by a factor determined by the open loop gain. Buffers designed for high input impedance commonly use this mechanism.
Operating Limit
Frequency response defines the boundary where the tracking capability begins to fail. Phase shifts within the feedback loop cause the tracking voltage to lag behind the input. This lag creates a complex residual current.
Voltage tracking fails at higher frequencies where the feedback begins to lag.
Calibration Demand
Verification of the tracking accuracy requires precise measurement of the gain at the feedback node. Minor deviations from a unity gain ratio result in a drop in effective impedance. Testing involves measuring the input current under various common mode conditions.
Stability margins are confirmed through step response analysis.
