Sensor Architecture
Photodiode array construction defines a backside illuminated stacked die through the physical inversion of the photosensitive substrate relative to its logic circuitry. This backside illuminated stacked die separates the light gathering region from the signal processing layers to minimize path interference. Metal interconnects no longer obstruct the pixel apertures because photons strike the silicon surface directly.
Higher quantum efficiency results from this structural change.
Processing Topology
Vertical integration connects the image sensor layer to the processing chip using high density micro-bumps. Logic functions reside on a separate wafer bonded underneath the active imaging pixels. Data transit distances shrink to the thickness of the thin silicon layers.
Through silicon vias establish the electrical pathways between these planes to maintain synchronization. Performance gains occur because the logic wafer carries specialized circuitry for noise reduction and high speed image readout without occupying valuable pixel area.
Interference Constraints
Photon crosstalk limits the signal to noise ratio in thin silicon layers. Photons passing through a single pixel can strike adjacent wells unless deep trench isolation barriers prevent lateral travel. Manufacturers calibrate these structures against dark current density to ensure that thermal noise remains below the threshold of detection.
Standard tolerances for these offsets appear in the component data sheet provided by the semiconductor fabrication facility.
Metrological Verification
Quantum efficiency testing determines the spectral response of the device across the visible and infrared bands. Technicians measure the photon conversion count under controlled lighting to calculate the sensitivity of the sensor. External calibration against a primary standard determines the absolute accuracy of the output signal.
Variations in the incident angle of incoming light cause a measurable drift in the output current. This component provides the maximum photon capture area currently achievable for high density imaging arrays.