Thermal Correction
Correction topologies for integrated voltage references alter circuit biasing to counteract non-linear temperature coefficients in bipolar junction devices. Silicon reference voltages depend on the sum of a base-emitter voltage with a negative temperature coefficient and a thermal voltage scaled with a positive temperature coefficient. Second-order curvature remains because the base-emitter voltage contains temperature-dependent terms beyond linear approximation.
Active circuit elements inject non-linear currents derived from square-law generators into the summing node to match curvature deviations across operating ranges.
Error Mitigation
Internal bias networks adjust operating currents across thermal bounds to preserve potential output levels. Uncompensated bandgap drift compensation limits voltage stability across extended operational windows when physical strain or aging shifts transconductance parameters. Encapsulation package stresses distort transistor geometries and shift base-emitter voltages away from ideal curves.
Trimming networks modify local current density ratios using thin-film resistor arrays to match parabolic profiles at calibrated reference temperatures.
Factory Calibration
Measurement systems evaluate reference output voltages across discrete temperature steps inside environmental chambers. Automated probes record output variation at specified thermal thresholds to determine second-order correction values. Wafer-level trimming sets local correction coefficients during production testing.
Drift Limit
Long-term drift specifications require verification under continuous high-temperature operating conditions over one thousand hours. Component aging degrades compensation stability through resistor drift and lattice changes. Continuous verification establishes maximum allowable deviation bounds for operational references.