Characterizing Dynamic Front End Filter Group Delay Mismatches across Dual Sourced Commercial Sensors
Unstated front-end filter group delay mismatches across dual-sourced sensors create dynamic phase errors that destabilize real-time fusion loops.
Switched Capacitor Sampling
Charge Transfer
Discrete-time analog front-end circuits capture analog voltage signals by periodically transferring charge between integrated switch networks and hold capacitors. The term switched capacitor sampling describes the analog-to-digital converter input architecture where MOS switches connect a sampling capacitor to an input signal during the acquisition phase and transfer the stored charge to a processing amplifier during the conversion phase. Precision operational amplifiers and low-leakage CMOS switches achieve high linearity and low power consumption without requiring high-value integrated resistors.
Input impedance varies inversely with clock frequency, demanding low-impedance sensor signal conditioning drivers to avoid gain errors. Calibration procedures account for charge injection and clock feedthrough artifacts inherent to switch transition events.
Sampling Dynamics
Equivalent input resistance equals the inverse product of switching frequency and sampling capacitance value. Fast switching rates reduce input impedance, placing higher current drive requirements on preceding sensor buffer amplifiers.
Switching Artifact
Charge injection occurs when channel charge from turning off MOS switches flows into the sampling capacitor, introducing voltage offset errors. Clock feedthrough transfers gate voltage transients through parasitic switch capacitances directly to the analog sampling node. Differential circuit topologies cancel common-mode switch artifacts, improving signal-to-noise ratios in high-resolution converter stages.
Non-overlapping clock signals prevent simultaneous switch closure, eliminating direct current paths between input source and reference nodes. Settling time requirements mandate that the input signal settle within half an LSB during the acquisition window. Sampling thermal noise, expressed as kT over C, sets the fundamental noise floor for a given sampling capacitor size.
Bandwidth Limit
Input signal frequencies above half the sampling frequency create aliased spectral components that degrade measurement accuracy. Insufficient acquisition time creates gain compression and non-linear distortion when digitizing high-frequency sensor output waveforms.