Mathematical Model
An analytical method in microelectronics packaging calculates the interfacial shear and peeling stresses developed in bonded bimaterial assemblies due to mismatched thermal expansion. Applying the Suhir stress formula allows design engineers to estimate the structural integrity of silicon dies mounted on organic substrates. This mathematical formulation accounts for the compliance of the adhesive layer, which acts to mitigate the stiffness of the bonded components.
The calculations provide a rapid alternative to complex numerical simulations during the initial design phase.
Force Analysis
Differential thermal expansion between the joined materials generates shear stresses that peak at the edges of the assembly. These forces are distributed through the bonding layer, with the magnitude depending on the thickness and elastic modulus of each material. If the shear stress exceeds the adhesive strength of the interface, delamination occurs, which often leads to electrical failure.
Adjusting the material thicknesses allows designers to distribute these stresses more evenly.
Validation Technique
Verification of these analytical calculations relies on strain gauge measurements and optical interferometry during thermal cycling. These experimental methods record the bending of the assembly to confirm the calculated curvature and stress levels. Discrepancies between the model and the actual measurements are used to refine the boundary conditions in the formula.
Design Utility
Optimizing the mechanical properties of the adhesive layer reduces the peak peeling stresses. This stress reduction is critical for ensuring the long-term reliability of multi-material microelectronic packages under severe temperature swings.