Mitigating Switched Capacitor ADC Load Transient Drift in Integrated References
Mitigating switched-capacitor reference droop requires a low-ESR reservoir capacitor sized to charge-redistribution ratios and Kelvin-connected to analog ground.
Reference Load Transient
Electrical Behavior
A temporary voltage fluctuation on a stable electrical node occurs when a circuit abruptly draws current from a voltage reference. This reference load transient disturbs the input voltage of high-speed analog-to-digital converters during the acquisition phase. When the sampling switches close, the internal sampling capacitor array draws a sudden current spike.
If this voltage does not recover quickly, conversion errors occur.
Driver Requirement
High-speed buffers must supply the required charge immediately to prevent the reference voltage from dropping. When managing a reference load transient, the buffer needs a wide bandwidth to handle the high-speed transitions. The output impedance of the driver circuit must remain very low across the entire frequency range.
This prevents long-lasting voltage ringing that would disrupt the digital decision cycles.
Stabilization Technique
Decoupling capacitors placed very close to the reference pins provide the necessary local charge storage. These capacitors absorb the initial current spike and minimize the voltage drop. The board layout must keep the trace inductance as small as possible.
This optimization ensures a rapid recovery time.
Measurement Validation
Oscilloscope measurements with high-bandwidth probes are used to verify the recovery time. This test confirms that the reference node returns to its nominal value within the required clock cycle.