Transport Reduction
Evaluation of transistor speed in complementary semiconductor circuits requires monitoring the transfer rate of positive charge carriers. Hole mobility degradation is the reduction in the drift velocity of holes per unit electric field within the channel of a p-type transistor. This phenomenon is a primary cause of drive current reduction in devices exposed to ionizing radiation or electrical stress.
Scattering Origin
Trapped charges at the semiconductor-oxide interface alter the electric field profile and act as scattering centers. During stress or radiation exposure, hole mobility degradation occurs because of increased Coulomb scattering between the mobile holes and the fixed charges trapped in the dielectric layer. Surface roughness scattering also plays a role when high gate voltages draw the carrier channel closer to the non-ideal interface.
These combined scattering events lower the average carrier velocity at any given field strength.
Metrological Characterization
Measurement of the mobility loss is typically conducted using split CV and current-voltage characterization on test transistors. This technique isolates the gate-to-channel capacitance from the total capacitance to accurately calculate the inversion charge density. The channel conductance then provides the effective mobility value across a range of gate biases.
Performance Impairment
Lower hole mobility translates directly into slower switching speeds in logic gates. Inverters and logic circuits exhibit asymmetrical rise and fall times when the p-channel transistor degrades faster than the n-channel device. This imbalance can lead to timing errors and limits the maximum operating frequency of the integrated circuit.
