Structural Imperfection
Dislocation loops and clusters of interstitials that form just beyond the amorphous-crystalline interface during thermal annealing create electronic traps. These flaws, termed end-of-range defects, reside in the region where ion energy was insufficient to fully amorphize the lattice but high enough to displace atoms into unstable positions. They act as potent recombination centres for charge carriers and can significantly degrade the carrier lifetime in the silicon.
This layer of damage is a byproduct of the recrystallization process that occurs when the substrate is heated to activate the dopants.
Leakage Source
Proximity to the depletion region of a p-n junction makes these flaws detrimental. They facilitate trap-assisted tunneling.
Measurement Strategy
Transmission electron microscopy allows for the direct visualization of the size and density of the dislocation loops. Metrologists use cross-sectional imaging to determine the exact distance between the junction and the layer of end-of-range defects. This spatial data informs the optimization of the implantation energy and the annealing temperature.
Thermal Budget
Extended heating at high temperatures can cause the loops to grow in size while decreasing in number through a process called Ostwald ripening. Manufacturers must balance the need for dopant activation against the risk of driving end-of-range defects into the active device area. If the thermal budget is too low, the defects remain small but numerous.