Conduction Regime
A semiconductor whose dopant impurity density exceeds the effective density of states exhibits metallic electrical characteristics because the Fermi energy enters the conduction or valence band. In this state, degenerate silicon maintains high mobile carrier populations even at absolute zero, eliminating the thermal carrier freeze-out observed in lightly doped substrates. The material functions as an ohmic conductor across broad thermal ranges, though carrier mobility drops markedly because of severe ionized impurity scattering.
Piezoresistive Response
Heavy boron or phosphorus doping dampens the stress-induced shift in piezoresistive gauge factors used within mechanical pressure transducers. While lower doping yields higher sensitivity to strain, degenerate silicon suppresses temperature coefficients of resistance, producing stable baseline voltages across fluctuating environments. Sensor designers accept a lower raw gauge factor in order to minimize thermal drift errors without elaborate analog compensation networks.
Mechanical stress modifies the band structure only slightly when bands are already deeply occupied by degenerate carriers.
Interface Resistance
Metallization contacts deposited onto heavily doped surfaces exhibit pure ohmic conduction without requiring high-temperature post-deposition alloying. The ultra-narrow depletion width of degenerate silicon permits quantum mechanical tunneling of charge carriers through the Schottky barrier. Specific contact resistivity drops below ten to the power of negative seven ohm square centimeters, which eliminates series resistance errors in precision current-monitoring chips.
Thin oxide interfacial layers or surface segregation of dopants can still degrade tunneling efficiency, necessitating four-terminal Kelvin test patterns on qualification wafers.
Qualification Standard
Incoming wafer inspection relies on four-point probe sheet resistance mapping combined with secondary ion mass spectrometry to verify dopant uniformity across whole ingots. Reference standards calibrated by national measurement institutes validate the geometric correction factors applied to the four-point probe head. When sheet resistivity measurements diverge from expected values, free carrier absorption spectroscopy or high-resolution x-ray diffraction isolates dopant precipitation from true lattice incorporation.
Degenerate silicon intended for cryogenic sensors undergoes liquid helium immersion testing to confirm the complete absence of carrier freeze-out signatures. Processing lines establish statistical process control limits on sheet resistance tolerances at plus or minus two percent across eight-inch production lots. Thermal oxidation steps require tight ambient control because heavy dopant concentrations accelerate oxidation rates and induce crystalline stacking faults.
Degenerate silicon establishes the low-impedance grounding paths and drift-free interconnect networks necessary for stable microelectromechanical instrumentation.
