Calibration Protocol
Meter verification requires a deterministic baseline to isolate systematic error from environmental drift. Phase loss quantification establishes the exact threshold where an unbalanced supply voltage trips protective relays. Calibration technicians execute this procedure by injecting controlled voltage sags into the sensing terminals until the internal comparator registers a fault condition.
Signal Degradation
Harmonic distortion on the power line introduces noise that mimics partial voltage suppression. Phase loss quantification depends entirely on filtered zero crossing detection to separate genuine line dropouts from harmonic interference. Thermal expansion within the transformer windings alters internal resistance, shifting the baseline calibration point over extended operational cycles.
Tolerance Limits
Standard IEC specifications dictate that tripping accuracy must remain within two percent of the nominal voltage rating across the operating temperature range. Phase loss quantification operates under strict laboratory reference conditions where ambient humidity and temperature are stabilized before verification begins. Field installations deviate from these bounds due to uncompensated cable impedance and varying load profiles, introducing measurement uncertainty that exceeds factory calibration certificates.
Fault Resolution
Relay response times dictate whether transient sags trigger an unnecessary circuit shutdown or pass safely through the protection matrix. Phase loss quantification provides the mathematical foundation for setting these trip delays without compromising downstream motor windings. Technicians verify the final configuration by comparing the recorded trip time against the manufacturer inverse time curve under simulated single phasing conditions.