Print Aperture and PCB Stackup Tradeoffs in High Density Packages
Fine-pitch package assembly requires pairing stencil foil reductions with thin outer-layer dielectrics to maintain solder transfer and controlled impedance.
HDI Stackup
Multi-layer Configuration
Circuit board architectures with high routing density use specialized layers and microvias to maximize interconnection density. This layout, known as an HDI stackup, enables the routing of fine-pitch ball grid array packages on compact substrates. It is defined by the number of sequential lamination cycles used during fabrication.
Blind Via
Microvias drilled by lasers connect adjacent layers without passing through the entire thickness of the circuit board. In an HDI stackup, these small holes reduce parasitic capacitance and inductance, which improves signal integrity at high frequencies. Utilizing these laser-drilled holes allows designers to place components closer together on both outer layers.
Manufacturing Sequence
Sequential buildup processes add dielectric and copper layers in multiple lamination cycles to create complex routing paths. This sequential method requires precise registration of each layer to prevent alignment errors in the microvias. Fabrication facilities verify this alignment using automated optical inspection before final assembly.
Thermal Constraint
Extreme thermal stresses during soldering can cause delamination between the thin dielectric layers of the board. The HDI stackup must withstand multiple thermal cycles without microvias cracking or separating from the capture pads. Selecting materials with a low coefficient of thermal expansion ensures the mechanical integrity of the interconnects under these harsh assembly conditions, preserving the electrical connection over the life of the product.