Common Centroid Transistor Layout Strategies for Low Drift Bandgap Cores
Common centroid transistor layouts for bandgap cores cancel linear thermal and lithographic gradients, reducing post-packaging output drift below 5 ppm per C.
Emitter Ratio Matching
Geometric Specification
Bipolar transistor pairs are designed with specific integer multiples of a base area to create predictable current density differences. Effective emitter ratio matching allows a bandgap reference to generate a proportional to absolute temperature voltage. This relationship forms the physical basis for thermal compensation in analog power management.
Ratio Accuracy
Small deviations in the photolithographic process cause the actual area of the silicon to differ from the intended design. Because emitter ratio matching relies on the ratio of the areas rather than the absolute size, using identical unit cells minimizes these errors. A ten to one ratio is typically constructed from eleven identical transistors to ensure consistency.
Thermal Gradient
Power dissipation in one part of the chip creates temperature differences between the paired devices. If emitter ratio matching is compromised by a temperature delta, the resulting output voltage will drift. Proper layout techniques like common centroid placement protect the integrity of the ratio.
Metrological Impact
Precision of the reference output is directly limited by the quality of the silicon fabrication. When emitter ratio matching is precise, the initial accuracy of a voltage reference is high. Final calibration steps such as wafer level trimming compensate for any remaining geometric mismatches.