Chemical Kinetics
A selective removal process defines how an anisotropic wet etching operation creates geometric patterns on a substrate through liquid reactants. This fabrication method relies on the difference in dissolution rates between various crystal planes of silicon or other semiconductors. The specific chemical activity depends on the alignment of the silicon lattice structure relative to the etchant concentration and temperature.
Etchant species react significantly faster on planes with higher atomic density, which dictates the slope and definition of the resulting trench sidewalls.
Etchant Composition
Potassium hydroxide and tetramethylammonium hydroxide frequently serve as the primary liquid reagents during the removal process. These alkaline solutions demonstrate high selectivity toward the 100 crystal orientation when exposed to silicon wafers. Precision during this sequence requires control of bath temperature to stabilize the reaction rate across the entire surface area.
Variations in reagent molarity introduce interference in the profile of the etched feature, often resulting in surface roughness or unintended undercutting at the mask interface.
Profile Geometry
Geometrical constraints govern the final form of the etched feature based on the orientation of the mask edges relative to the crystal lattice. Pattern alignment marks ensure the etchant accesses specific planes while shielding others from chemical attack. Proper design of the lithographic mask accounts for the inevitable convex corner compensation needed to preserve sharp features on the semiconductor surface.
Maintaining this geometric integrity demands strict adherence to the manufacturer specifications regarding crystalline alignment and mask material adhesion.
Process Verification
Metrological evaluation of the etched depth involves optical profilometry or scanning electron microscopy to confirm the profile geometry meets design specifications. Calibration of the equipment ensures the liquid bath temperature remains within a range of one degree Celsius throughout the cycle. Thickness measurements verify the etching rate remains uniform across the wafer batch, preventing local variations that cause signal dispersion in final components.
High quality results depend on the stability of the chemical interface at the boundary between the resist and the semiconductor substrate.