Second Source Qualification When the Alternate Part Uses Different Physics
Replacing a primary sensor with an alternate physics module requires rebuilding signal conditioning, cross-sensitivity models, and chamber qualification suites
Switched-Capacitor Amplifier
Charge Transfer
Discrete-time analog processing circuits emulate high-value resistors using switches and precision integrated capacitors. A switched-capacitor amplifier processes continuous analog signals by sampling charge onto feedback capacitors during alternating clock phases. This architecture delivers precise voltage gain controlled by capacitor ratios.
Clock Feedthrough
MOSFET switch parasitic capacitance injects clock charge into sampling nodes, producing clock feedthrough offset voltages and dynamic distortion. Fully differential topologies cancel common-mode charge injection and clock feedthrough artifacts across differential signal paths. Careful clock phase non-overlap timing prevents charge sharing errors during switch transitions between sampling and amplification phases.
Sampling Frequency
Clock rates must satisfy Nyquist criteria while allowing sufficient time for operational amplifiers to settle voltage levels completely within each clock phase. Incomplete settling introduces gain errors and harmonic distortion, limiting maximum achievable clock frequencies. Switched-capacitor circuits integrate seamlessly into CMOS semiconductor processes without precision resistors.
Gain Accuracy
Gain precision depends on lithographic capacitor area ratios rather than absolute capacitance values, achieving ratio matching accuracies better than zero point one percent. Thermal noise (kTC noise) sampled during switch turn-off limits overall dynamic range, requiring larger sampling capacitors to maintain high signal-to-noise ratios. Characterization testing evaluates settling time, total harmonic distortion and gain drift under maximum clock frequencies.
Switched-capacitor amplifier circuits enable precise gain stages in integrated data converters.