Bus Protocol
Serial communication protocols utilize a two-wire, open-drain architecture to connect multiple integrated circuits on a printed circuit board. This architecture defines standard mode i2c as operating at transmission speeds up to one hundred kilobits per second using a serial data line and a serial clock line. It allows multiple master and slave devices to share the same communication bus.
Timing Constraint
Transceivers require specific minimum hold and setup times for data changes relative to the clock signal to prevent communication errors. In this mode, the minimum clock low period is set to four point seven microseconds, while the minimum clock high period is four microseconds. These long intervals give slower microcontrollers sufficient time to process incoming data bits and respond appropriately.
Bus Capacitance
Total physical capacitance of the signal lines increases with the number of connected devices and the length of the printed circuit board traces. This capacitance slows the rise times of the signal transitions, which can cause communication failures if it exceeds the maximum limit of four hundred picofarads. When the bus capacitance is high, active pull-up circuits can be used to improve performance.
Pullup Resistor
Passive open-drain configurations require external resistors to pull the signal lines high when the transceivers release them. The value of these resistors represents a trade-off between the power consumed by the system and the speed of the rising signal edges. Choosing resistors that are too small increases power consumption, while resistors that are too large cannot pull the lines high quickly enough to meet timing requirements.
Designers must calculate the minimum and maximum resistor values based on the supply voltage and total bus capacitance of the system.