Assembly Stress
Mechanical deformation occurs within semiconductor dies due to the mismatch in thermal expansion coefficients between the silicon and its encapsulation. The presence of package induced microstrain can alter the electrical characteristics of the transistors and the precision resistors embedded in the chip.
Thermal Expansion
Differing rates of contraction during the cooling phase of the assembly process create a permanent compressive or tensile force on the die surface. This package induced microstrain is most severe at the corners of the chip where the distance from the neutral axis is greatest. Stress sensors integrated into the silicon design are often used to measure the magnitude of these forces in real time.
Protective coatings and specialized molding compounds are selected to minimize the transfer of stress from the plastic package to the sensitive circuitry. Because the effect is temperature dependent, the package induced microstrain changes as the device heats up during normal operation.
Signal Shift
Analog circuits are particularly sensitive to these mechanical changes as they cause the offset voltage to drift. Minimizing package induced microstrain is necessary for the production of high precision voltage references and converters.
Mitigation Strategy
Layout techniques such as placing critical components in the center of the die help reduce the impact of the mechanical load. Final testing verifies that the package induced microstrain remains below the level that would cause a functional failure.
